VR-World says that stage one results are finished and where shown off this week at SC15. This included a Heterogeneous Compute Compiler (HCC); a headless Linux driver and HSA runtime infrastructure for cluster-class, High Performance Computing (HPC); and the Heterogeneous-compute Interface for Portability (HIP) tool for porting CUDA-based applications to C++ programming.

AMD hopes the tools will drive application performance from machine learning to molecular dynamics, and from oil and gas to visual effects and computer-generated imaging.

Jim Belak, co-lead of the US Department of Energy’s Exascale Co-design Center in Extreme Materials and senior computational materials scientist at Lawrence Livermore National Laboratory said that AMD’s Heterogeneous-compute Interface for Portability enables performance portability for the HPC community.

“The ability to take code that was written for one architecture and transfer it to another architecture without a negative impact on performance is extremely powerful. The work AMD is doing to produce a high-performance compiler that sits below high-level programming models enables researchers to concentrate on solving problems and publishing groundbreaking research rather than worrying about hardware-specific optimizations.”

The new AMD Boltzmann Initiative suite includes an HCC compiler for C++ development, greatly expanding the field of programmers who can leverage HSA.

The new HCC C++ compiler is a key tool in enabling developers to easily and efficiently apply the hardware resources in heterogeneous systems. The compiler offers more simplified development via single source execution, with both the CPU and GPU code in the same file.

The compiler automates the placement code that executes on both processing elements for maximum execution efficiency.

Source- http://www.thegurureview.net/computing-category/amd-appears-to-be-pushing-its-boltzmann-plan.html

Over the last few months both have been busy with new releases. Nvidia has its GeForce GTX 950 and GTX 980 Ti, while AMD put its first HBM-powered cards in the Radeon R9 Fury X, Fury and the super-small R9 Nano into the shops.

According to JPR, overall GPU shipments are up quarter-over-quarter – with AMD’s overall GPU shipments up 15.8 per cent. But before AMD fanboys get all excited by a surprise return to form from AMD, JPR said that that NVIDIA “had an exceptionally strong quarter”. Nvidia saw an uptick of 21.3 per cent.

The PC market as a whole increased by 7.5 per cent quarter-over-quarter but decreased 9 per cent year-over-year. Nivida’s discrete GPU shipments were up 26.3 per cent according to JPR, while AMD’s discrete GPUs spiked by 33 per cent.

AMD’s mobile GPU shipments for notebooks increased by 17 per cent, while NVIDIA had 14 per cent.

Ericsson, whose like-for-like sales are down 7 percent so far this year and were roughly flat over the previous three years, said the partnership means new areas of revenue as it will boost its addressable market, mainly in professional services, software and the resale of Cisco products.

“We are the wireless No. 1 in the world,” Ericsson Chief Executive Hans Vestberg told Reuters.

“Cisco is by far the No. 1 in the world when it comes to IP routers. Together we can create innovative solutions.”

The companies said in a statement they would together offer routing, data center, networking, cloud, mobility, management and control, and global services capabilities.

“The strategic partnership will be a key driver of growth and value for the next decade, with each company benefiting from incremental revenue in calendar year 2016 and expected to ramp (up) to $1 billion or more for each by 2018,” they said.

Ericsson expects full-year cost synergies of 1 billion Swedish crowns ($115 million) in 2018 due to the partnership and said it would continue to explore further joint business opportunities with Cisco.

Source http://www.thegurureview.net/aroundnet-category/ericsson-and-cisco-join-forces-in-network-partnership.html

Revenues for the last part of the year will be adversely affected by an about one per cent drop in wafer ASPs and capacity at its plants will slide to 81-83 per cent in the fourth quarter from 89% in the third.

UMC’s had already lowered capacity in the third quarter. At the beginning of the year it was running at 94 percent.

The company’s revenues decreased 7.1 per cent to $1.07 billion in the third quarter, with gross margin slipping below 20 per cent.

UMC net profits were down 62.9 per cent on quarter, as both operating and non-operating income eroded. This is bad news because in the first three quarters of 2015, UMC’s net profits increased 35.8 per cent from a year earlier.

However UMC is continuing to invest in new capital and will spend $1.8 billion.

CEO Po-Wen Yen said that the continuing IC inventory adjustment will dampen fourth quarter wafer shipments, but UMC continues on the path towards long-term growth.

“Throughout 2015, UMC engineers and Fab12A have worked tirelessly to bring several new 28nm product tape-outs into volume production. “UMC is working to bring a timely conversion of new 28nm requirements into production, which will strengthen our business.”
Courtesy-http://www.thegurureview.net/computing-category/will-umc-chip-shipments-drop-in-the-fall.html

Designed for demanding embedded needs, the processors incorporate the newest AMD 64-bit x86 CPU core (“Excavator”), plus third-generation Graphics Core Next GPU architecture, and better power management for reduced energy consumption.

AMD tells us that combined, these chips provide industry-leading graphics performance and key embedded features for next-generation designs. The SOC architecture enables simplified, small form factor board and system designs from AMD customers and a number of third party development platform providers.

What AMD brings to the party is its graphics and multimedia performance, including capability for hardware-accelerated decode of 4K video playback and support for the latest DDR4 memory.
Jim McGregor, principal analyst, TIRIAS Research said that AMDs push into x86 embedded platforms is paying off with an increasing number of customers and applications.

“There is a need for immersive graphics, high-quality visualization, and parallel computing in an increasing number of embedded applications. Across these fronts, the AMD Embedded R-Series SOC is a very compelling solution.”

Scott Aylor, corporate vice president and general manager, AMD Embedded Solutions said that his outfit’s AMD Embedded R-Series SOC is a strong match for these needs in a variety of industries including digital signage, retail signage, medical imaging, electronic gaming machines, media storage, and communications and networking.

“The platform offers a strong value proposition for this next generation of high-performance, low-power embedded designs.”

The new AMD Embedded R-Series SOCs offer 22 percent improved GPU performance when compared to the 2nd Generation AMD Embedded R-Series APU2 and a 58 percent advantage against the Intel Broadwell Core i7 when running graphics-intensive benchmarks.

AMD released some of the specs for its integrated AMD Radeon graphics including:

Up to eight compute units4 and two rendering blocks

GPU clock speeds up to 800MHz resulting in 819 GFLOPS

•DirectX 12 support

Fully HSA Enabled

The AMD Embedded R-Series SOC was architected with embedded customers in mind and includes features such as industrial temperature support, dual-channel DDR3 or DDR4 support with ECC (Error Correction Code), Secure Boot, and a broad range of processor options.

It has a configurable thermal design power (cTDP) allows designers to adjust the TDPs from 12W to 35W in 1W increments for greater flexibility.

The SOC also has a 35 percent reduced footprint when compared to the 2nd Generation AMD Embedded R-Series APU, making it an excellent choice for small form factor applications.

AMD said that the range is the first embedded processor with dual-channel 64-bit DDR4 or DDR3 with Error-Correction Code (ECC), with speeds up to DDR4-2400 and DDR3-2133, and support for 1.2V DDR4 and 1.5V/1.35V DDR3.

Its dedicated AMD Secure Processor supports secure boot with AMD Hardware Validated Boot (HVB) and initiates trusted boot environment before starting x86 cores
It has a high-performance Integrated FCH featuring PCIe Gen3 USB3.0, SATA3, SD, GPIO, SPI, I2S, I2C, and UART

The AMD Embedded R-Series SOC provides industry-leading ten-year longevity of supply. The processors support Microsoft Windows 7, Windows Embedded 7 and 8 Standard, Windows 8.1, Windows 10, and AMD’s all-open Linux driver including Mentor Embedded Linux from Mentor Graphics and their Sourcery CodeBench IDE development tools.

It will be interesting to see if AMD can make up the ground it has lost on PCs and higher ticket items. Most of the company still appears to be in a holding pattern until Zen arrives.

Courtesy-http://www.thegurureview.net/computing-category/will-amds-newest-soc-save-the-company.html

The new Mali-470 GPU has half the power consumption and two times the energy efficiency of the Mali-400, and is designed for next-generation wearables and IoT devices such as industrial control panels and healthcare monitors that rely on low-cost and low-power chips.

The Mali-470 supports OpenGL ES 2.0, used by Android and Android Wear, hinting that the GPU could also find its way into low-cost smartphones. If not, ARM promises that the chip will bring smartphone-quality visuals to wearable and IoT devices, supporting screen resolutions of up to 640×640 on single-core devices, and higher resolutions for multi-core configurations.

ARM envisions the new GPU paired with its efficient Cortex-A7 or A53 CPU designs for a low-power SoC.

“ARM scrutinises every milliwatt across the entire SoC to enable OEMs to optimize energy efficiency and open up new opportunities,” said Mark Dickinson, vice president and general manager of ARM’s multimedia processing group.

“Tuning efficiency is particularly relevant for devices requiring sophisticated graphics on a low power budget such as wearables, entry-level smartphones and IoT devices. The Mali-470 has been designed to meet this demand by enabling a highly capable user interface while being extremely energy efficient.”

ARM expects the first SoCs using the GPU be ready by the end of 2016, meaning that the chip will start showing up in devices the following year.

The launch of the Mali-470 GPU comes just hours after ARM announced plans to pick up the product portfolio and other business assets of Carbon Design Systems, a supplier of cycle-accurate virtual prototyping solutions.

The deal will see Carbon’s staff transfer to ARM, where the chip firm will make use of the Massachusetts-based outfit’s expertise in virtual prototypes. This will enable ARM to iron out any bugs and make improvements to chips before they move to foundries for production.

ARM also said that Carbon will help the firm enhance its capability in SoC architectural exploration, system analysis and software bring-up.

Courtesy-TheInq

Chief executive Lisa Su admitted that ARM-based server chips have experienced slower-than-expected reception from the owners of data centres and server farms.

AMD delayed its own ARM-based Opteron microprocessor, code-named Seattle, until the fourth quarter of this year. ARM was having a harder time proving itself to the multibillion-dollar market for high-end server chips.

An engineering sample of AMD’s long awaited 8 core server SOC code named “Hierofalcon” has been spotted and tested and according to WCCTech it looked pretty good. Itis based around 8 ARM-64bit A57 cores running at 2.0Ghz. And although Hierofalcon maxes out at frugal TDP of 30W.

So even the promising reviews aren’t enough for AMD to be optimistic about the ARM based gear.

Su said in an analyst conference call that the company expects to see “modest production shipments” of Seattle in the fourth quarter. Meanwhile, AMD’s Intel-compatible “x86″ server chips will be the company’s mainstay product offering for data centres.

She said that AMD was continuing its ARM efforts and is seeing them as a longer term bet.

Source-http://www.thegurureview.net/computing-category/amds-bet-on-arm-does-not-appear-to-be-helping.html

The outfit has been going through hell lately. Last month AMD ace CPU architect Jim Keller stepped away from the company after completing his work on Zen.

Rogers was one of AMD’s high-ranking technology and engineering corporate fellows, and been responsible for helping to develop the software ecosystem behind AMD’s heterogeneous computing products and the Heterogeneous System Architecture.

He was a public figure for AMD and active on the software development and evangelism side, frequently presenting the latest HSA tech and announcements for AMD at keynotes and conferences.

While he is not the only person working on the software side of HSA at AMD, Rogers’ role in its development is important. Rogers was a major contributor to the HSA Foundation, helping to initially found it in 2012. He served as the Foundation’s president until he left AMD.

It seems his defection was kept secret, and took place sometime this quarter and did not manage to leak.

According to his LinkedIn profile Phil Rogers is now Nvidia’s “Chief Software Architect – Compute Server” which is similar to what he was doing over at AMD. Nvidia is not a member of the HSA Foundation, but they are currently gearing up for the launch of the Pascal GPU family, which has some features that overlap well with Phil Rogers’ expertise.

Pascal’s NVLink CPU & GPU interconnect would allow tightly coupled heterogonous computing similar to what AMD has been working on. It makes a fair bit of sense for Nvidia to bring over a heterogeneous compute specialist makes a great deal of sense.

Rogers’ departure from AMD will have to be mentioned on the earnings call on the 15th. AMD’s Gregory Stoner will probably replace him. Stoner is AMD’s current Senior Director of Compute Solutions Technology and long-time Vice President of the HSA Foundation.

Source-http://www.thegurureview.net/computing-category/is-amd-losing-top-scientist-to-nvidia.html

According to EETimes Paul Boudre, who claimed that SOI is already being used by Apple and Intel even though neither company is broadcasting it. SOI appears to be on track to major market penetration even while the rest of the industry is talking FinFETs.

GlobalFoundries general manager Rutger Wijburg told the SEMICON Europa 2015 that his outfit’s 22-nanometer “22FDX” SOI platform delivers FinFET-like performance but at a much lower power point and at a cost comparable to 28-nanometer planar technologies.

The 300-millimeter $250 million FD-SOI foundry here in the “Silicon Saxony” area of Germany, builds on 20 years of GlobalFoundries’ investments in Europe’s largest semiconductor fabs.

GlobalFoundries said it will extend Moore’s Law by using fully-deleted silicon-on-insulator (FD-SOI) transistors on wafers bought from Soitec.

Many had thought that if GloFlo’s FD-SOI gamble paid off then it would be a while before FinFET would have a serious rival. But Boudre’s claims suggests that SOI is already being used.

Customers like Intel and OEMs supplying fully-deleted silicon-on-insulator (FD-SOI) RF transistors to Apple proves that SOI and Soitec are past the cusp of the growth curve, destined to ramp up exponentially.

The problem for Soitec is no one is really talking about it. Chipzilla is committed to the FinFET, because it is higher performance than FD-SOI, even though it is higher power too.
Boudre said that it was supplying SOI wafers to Intel for other applications that don’t require high-performance. For instance, our wafers are very good for their silicon photonics projects.

Apple is already using SOI for several radio frequency (RF) chips in their front-ends, because they use 20-times less power. The iPhone is still using gallium arsenide (GaAs) for its power amplifier (PA) because it needs the high-power device for good connections, but for other RF front-end chips, and in fact for all the chips that they want to keep “always on,” the lower power consumption of FD-SOI is pushing the smartphone makers to Soitec, Boudre said.

SOI wafers cost three-times as much as bulk silicon but the cost per die is less because of the simplified processing steps including fewer masks.

Normally GPS chips run on 0.8 volts and consume over 20 milliamps, so they must be turned off most of the time. But when they are made with SOI wafers, they can run on 0.4 volts and consume only 1 milliamp. The mobile device to leave them on all the time and new and more accurate location sensing and new kinds of location-based applications can be developed.

What is amusing then is that Intel’s reason for going with FinFETs was that SOI wafers were too expensive but it did find a use for it.

GlobalFoundries’ Saxony fab will offer four varieties of its 22FDX process.

FDX-ulp for the mainstream and low-cost smartphone market. This will use body-biasing to beat FinFETs on power, but equal them in performance.

FDX-uhp for networking applications using analogue integration to match FinFETs while minimizing energy consumption

FDX-ull for ultra-low power required by wearables and Internet of Things applications. This will have a 1 picoamp per micron leakage

DDX-rfa for radio frequency (RF) analogue applications delivering 50 percent lower power and reduced system costs for LTE-A cellular transceivers, high-order multiple-input/multiple-output (MIMO) WiFi combo chips and millimeter wave radar.

Courtesy-http://www.thegurureview.net/computing-category/ibm-and-intel-going-goflo-soi.html