Helio X25 was the fastest deca-core 20nm SoC from MediaTek with three cluster designs and this SoC ended up in quite a few prominent China higher end phones including a few Meizu devices. But it looks like customers wanted a bit faster camera, SoC and GPU performance for its late 2016 early 2017 phones, the ones that will launch before the Helio X30 comes to market.

Jeffrey Ju, Executive Vice President and Co-Chief Operating Officer at MediaTek said: “The MediaTek Helio platform fulfills the diverse needs of device makers. Based on the success of MediaTek Helio X20 and X25, we are introducing the upgraded MediaTek Helio X23 and X27. The new SoCs support premium dual camera photography and provide best in-class performance and power consumption,”

The Helio X25 has two Cortex A73 cores clocked at 2.5 GHz, four Cortex A53 clocked at 2.00 GHz and last four Cortex A53 clocked at 1.55GHz. The Mali GT880 graphics is clocked at 850 MHz.

The Helio X20 has two Cortex A73 cores clocked at 2.1 GHz, four Cortex A53 clocked at 1.85 GHz and last four Cortex A53 clocked at 1.4GHz. The Mali GT880 graphics is clocked at 780 MHz.

The newcomer, Helio X27, has two Cortex A73 cores clocked at 2.6 GHz, four Cortex A53 clocked at 2.00 GHz and the last four Cortex A53 clocked at 1.6 GHz. The Mali GT880 graphics is clocked at 875 MHz. The rest of the specification is identical to the Helio X25.

The Helio X23 has two Cortex A73 cores clocked at 2.3 GHz, four Cortex A53 clocked at 1.85 GHz and the last four Cortex A53 clocked at 1.4GHz. The Mali GT880 graphics is clocked at 780 MHz. As you can see, this is just a slightly faster version of Helio X20 and it sits just below Helio X25 with its specs.

Thanks to MediaTek-engineered advancements in the CPU/GPU heterogeneous computing scheduling algorithm, both products deliver more than a 20 percent overall processing improvement and significant increases in web browsing and application launching speeds. This definitely sounds promising but you should bear in mind that MediaTek had enough time to optimize these designs of the new and updated SoCs.

Phones based on the Helio X27 and X23 will be available soon.

Courtesy-Fud

However, Christopher Danely with Citigroup has bravely claimed that with its “Kaby Lake” family of processors, Intel remains a “step-function ahead of AMD Zen when Zen chips are released in Q416.”

He also doubts the benchmark stats that AMD presented to promote Zen’s capabilities relative to Intel’s microprocessors claiming that the AMD controlled benchmark compared an engineering sample of a Zen processor that has not been released yet against a three-month old Intel processor, with both chips clocked at 3.0 Ghz.

“We note the maximum speed for the Intel chip is 3.2 GHz. The result showed AMD completing the benchmark 2 per cent faster than Intel, implying higher CPU efficiency on a “clock for clock” basis. AMD kept both 8 core chips at the same clock speed of 3.0 Ghz, below the native clock speed of the Intel chip. The benchmark result showed the Zen Summit Ridge processor completing the Blender rendering benchmark in 48.07 seconds, 2 per cent ahead of Intel Broadwell-E chip’s time of 49.06 seconds. We note this is only one benchmark using a custom workload performed at an AMD event under controlled conditions, and therefore cannot be verified by third parties and does not represent expected results under all workloads, Danely said.

Instead he thinks that Chipzilla will benefit from its process technology lead while AMD’s manufacturing partner, Global Foundries, which has a “spotty track record.”

“After several of delays and eventually failing to develop 20nm and 14nm on its own, GlobalFoundries entered into a partnership agreement with Samsung in April 2014 to adopt Samsung’s 14nm FinFET process. Despite using the same tools, recipes, and materials as Samsung’s 14nm process, products built on GlobalFoundries’ 14nm did not appear until earlier this year, roughly a year after Samsung released its Exynos 7420 SoC built on its 14nm process,” Danely pointed out.

Since the partnership agreement with Samsung does not include 10nm or lower nodes, we think the technology gap between AMD and Intel will widen again once Intel migrates to 10nm next year.

Meanwhile Intel released its new Kaby Lake chips on an improved 14+nm process this month, featuring a 15 per cent performance improvement over its Skylake chips. Kaby Lake chips deliver up to 12 per cent faster productivity performance and 19 per cent faster web performance over comparable Skylake chips

“We expect independent benchmarks to show Intel’ performance is a step function ahead of AMD Zen when Zen chips are released in 4Q16,” he said.

Below you will find lots of rantings from Intel and AMD fanboys and we expect the language to be colourful. Those of a sensitive disposition might want to look away now.

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Company co-CEO Mark Liu said that while the fourth quarter could be a bit rough as customers start their inventory adjustments, TSMC’s sales for the quarter will still outperform those for the third quarter.

Talking to Digitimes Lui said that smartphone demand was affected negatively by macroeconomic factors in the first half of 2016. But apparently smartphone chip clients are ordering again in the second half of the year.

TSMC previously estimated its 2016 revenues would grow 5-10 per cent. The foundry expects to meet the high end of the growth guidance, Liu said. In his speech at the CEO Forum of SEMICON Taiwan 2016. Liu claimed that the foundry industry growth is being driven by the markets for smartphones, HPC, automotive and IoT.

Apps like Pokemon G will require more silicon chips used in mobile devices that will be another growth driver in the future, Liu said.

Courtesy-Fud

IBM launched its Power8 lineup of superscalar symmetric multiprocessors back in August 2013 at the Hot Chips conference, and the first systems became available in August 2014. The announcement was significant because it signaled the beginning of a continuing partnership between IBM and Nvidia to develop GPU-accelerated IBM server systems, beginning with the Tesla K40 GPU.

The result was an HPC “tag-team” where IBM’s Power8 architecture, a 12-core chip with 96MB of embedded memory, would eventually go on to power Nvidia’s next-generation Pascal architecture which debuted in April 2016 at the company’s GPU Technology Conference.

NVLINK, first announced in March 2014, uses a proprietary High-Speed Signaling interconnect (NVHS) developed by Nvidia. The company says NVHS transmits data over a differential pair running at up to 20Gbps, so eight of these differential 20Gbps connections will form a 160Gbps “Sub-Link” that sends data in one direction. Two sub-links—one for each direction—will form a 320Gbps, or 40GB/s bi-directional “Link” that connects processors together in a mesh framework (GPU-to-GPU or GPU-to-CPU).

NVLINK lanes upgrade from 20Gbps to 25Gbps

IBM is projecting its Power9 servers to be available beginning in the middle of 2017, with PCWorld reporting that the new processor lineup will include support for NVLINK 2.0 technology. Each NVLINK lane will communicate at 25Gbps, up from 20Gbps in the first iteration. With eight differential lanes, this translates to a 400Gbps (50GB/s) bi-directional link between CPUs and GPUs, or about 25 percent more performance if the information is correct.

NVLINK 2.0 capable servers arriving next year

Meanwhile, Nvidia has yet to release any NVLINK 2.0-capable GPUs, but a company presentation slide in Korean language suggests that the technology will first appear in Volta GPUs which are also scheduled for release sometime next year. We were originally under the impression that the new GPU architecture would release in 2018, as per Nvidia’s roadmap. But a source hinted last month that Volta would be getting 16nm FinFET treatment and may show up in roughly the same timeframe as AMD’s HBM 2.0-powered Vega sometime in 2017. After all, it is easier for Nvidia to launch sooner if the new architecture is built on the same node as the Pascal lineup.

Still ahead of PCI-Express 4.0

Nvidia claims that PCI-Express 3.0 (32GB/s with x16 bandwidth) significantly limits a GPU’s ability to access a CPU’s memory system and is about “four to five times slower” than its proprietary standard. Even PCI-Express 4.0, releasing later in 2017, is limited to 64GB/s on a slot with x16 bandwidth.

To put this in perspective, Nvidia’s Tesla P100 Accelerator uses four 40GB/s NVLINK ports to connect clusters of GPUs and CPUs, for a total of 160GB/s of bandwidth.

With a generational NVLINK upgrade from 40GB/s to 50GB/s bi-directional links, the company could release a future Volta-based GPU with four 50GB/s NVLINK ports totaling of 200GB/s of bandwidth, well above and beyond the specifications of the new PCI-Express standard.

Courtesy-Fud

According to the slides published by Computerbase.de, both GPUs are based on AMD’s 4th generation Graphics Core Next (GCN 4.0) GPU architecture, offer 2.8 perf/watt improvement compared to the previous generation, have 4K encode and decode capabilities as well as bring DisplayPort 1.3/1.4 and HDR support.

Powering three different graphics cards, these two GPUs will cover different market segments, so the Polaris 10, codename Ellesmere, will be powering both the Radeon RX 480, meant for affordable VR and 1440p gaming as well as the recently unveiled RX 470, meant to cover the 1080p gaming segment. The Polaris 10 packs 36 Compute Units (CUs) so it should end up with 2304 Stream Processors. Both the RX 480 and RX 470 should be coming with 4GB or 8GB of GDDR5 memory, paired up with a 256-bit memory interface. The Ellesmere GPU offers over 5 TFLOPs of compute performance and should peak at 150W.

The Radeon RX 470 should be based on Ellesmere Pro GPU and will probably end up with both lower clocks as well as less Stream Processors and according to our sources close to the company, should launch with a US $179 price tag, while the RX 480 should launch on 29th of June with a US $199 price tag for a reference 4GB version. Most AIB partners will come up with a custom 8GB graphics cards which should probably launch at US $279+.

The Polaris 11 GPU, codename Baffin, will have 16 CUs and should end up with 1024 Stream Processors. The recently unveiled Radeon RX 460 based on this GPU should come with 4GB of GDDR5 memory paired up with a 128-bit memory interface. The Radeon RX 460 targets casual and MOBA gamers and should provide decent competition to the Geforce GTX 950 as both have a TDP of below 75W and do not need additional PCIe power connectors.

According to earlier leaked benchmarks, AMD’s Polaris architecture packs quite a punch considering both its price and TDP so AMD just might have a chance to get a much needed rebound in the market share.

Courtesy-Fud

The Micron 1100 SSD is a more mainstream oriented SSD that will be based on Marvell’s 88SS1074 controller and Micron’s 384Gb 32-layer TLC NAND. Using a SATA 6Gbps interface and available in M.2 and 2.5-inch form-factors, the Micron 1100 should replace Micron’s mainstream M600 series, based on 16nm MLC NAND.

The Micron 1100 SSD will be available in 256GB, 512GB, 1TB and 2TB capacities. It will offer sequential performance of up to 530MB/s for read and up to 500MB/s for write with random 4K performance of up to 92K for read and up to 83K IOPS for write. With such performance, it is obvious that the Micron 1100 series will target mainstream market and be a budget SSD.

The Micron 2100 is an M.2 PCIe NVMe SSD that is actually Micron’s first client oriented PCIe SSD and also the first PCIe SSD based on 3D NAND. Unfortuantely, Micron did not finalize the precise specifications so we still do not have precise performance numbers but it will be available in capacities reaching 1TB.

The Micron 1100 is expected to hit mass production in July so we should expect some of the first drives by the end of the next month. The Micron 2100 will be coming by the end of summer.

Courtesy-Fud

A recent Chinese-language Economic Daily News report claims that Mediatek wants the spun off business to drive VR sales. It all sounds pretty good but MediaTek have sort of denied the report.

Well we say sort of denied it. What it has told the Taiwan Stock Exchange  that it was not the report’s source, which is not quite the same thing.The spin off could go ahead, but MediaTek is denying that it told the EDN its cunning plans. But then again the EDN did not name its source either. Without a denial from the company we are none the wiser.

MediaTek’s VR unit was set up between end-2015 and early-2016 to focus on the development of the company’s VR solutions for handsets, the EDN thought.

Digitimes’ deep throats claimed TSMC is expected to achieve certification on its 10nm process in the fourth quarter of 2016, and deliver product samples to the customer for validation in the first quarter of 2017.

This means that TSMC could begin small-volume production for Apple’s A11 chips as early as the second quarter of 2017 and building the chips will likely start to generate revenues at TSMC in the third quarter. The A11-series processor will power the iPhone models slated for launch in the second half of 2017.

TSMC is expected to get two-thirds of the overall A11 chip orders from Apple.

The company is officially refusing to comment on Digitimes’ story, but it does fit into what we have already been told about Jobs’ Mob’s plans for next year.

The 2nd generation High Bandwidth Memory (HBM 2.0) for high-end GPUs might happen in very late Q4 2016 but realistically it probably won’t ship until 2017 in any volume.

The first card that we expect supporting this feature might be the Greenland, a card that AMD might end up calling Vega. Even according Radeon Technology Group’s official GPU roadmap, Vega / Greenland now look like a 2017 product, or at very best, late 2016 card. Nvidia might make the HBM 2.0 version of the Titan card, but we don’t expect to see a Geforce GTX based on Pascal GPU and HBM 2.0 coming to the market this year.

We managed to talk to some of the memory manufactures and they told us that HBM 2.0 is very limited in supply, and limited supply makes things expensive.

It seems that GPUs of 2016, including the new AMD Polaris and the new Geforce, will be stuck with GDDR5 and in best case scenario with GDDR5X from Micron. The word on the street is that both Geforce GTX based on Pascal and AMD/RTG’s Polaris 10 / Ellesmere and Polaris 11 / Baffin might launch at Computex during last days of May or early June 2016.

Courtesy-Fud

For TSMC, Q1 2016 was marked by a reduction of demand for high-end smartphones, while smartphone demand in China and emerging markets had upward momentum. Beginning Q2 2016 and onward, the company expect to get back onto a growth trajectory and is projected to hit a 5 to 10 percent growth rate in 2016.

“Our 10-nanometer technology development is on track,” said company president and co-CEO Mark Liu during the company’s Q4 2015 earnings call. “We are currently in intensive yield learning mode in our technology development. Our 256-megabit SRAM is yielding well. We expect to complete process and product qualification and begin customer product tape-outs this quarter.”

“Our 7-nanometer technology development progress is on schedule as well. TSMC’s 7 nanometer technology development leverage our 10-nanometer development very effectively. At the same time, TSMC’s 7-nanometer offers a substantial density improvement, performance improvement and power reduction from 10-nanometer.

These two technologies, 10-nanometer and 7-nanometer, will cover a very wide range of applications, including application processors for smartphone, high-end networking, advanced graphics, field-programmable gate arrays, game consoles, wearables and other consumer products.”

In Q1 2016, TSMC reached a gross margin of 44.9 percent, an operating margin of 34.6 percent and a net profit margin of 31.8 percent respectively. Going forward into Q2 2016, the company is expecting revenue between ~$6.65 billion and ~$6.74 billion USD, gross margins between 49 and 51 percent, and operating profit margins between 38.5 and 40.5 percent, respectively.

Chips used for communications and industrial uses represented over 80 percent of TSMC’s revenue in FY 2015. The company was also able to improve its margins by increasing 16-nanometer production, and like many other semiconductor companies, is preparing for an expected upswing sometime in 2017.

In February, a 6.4-magnitude earthquake struck southern Taiwan where TSMC’s 12-inch Fab 14 is located, a current site of 16-nanometer production. The company expected to have a manufacturing impact above 1 percent in the region with a slight reduction in wafer shipments for the quarter.

“Although the February 6 earthquake caused some delay in wafer shipments in the first quarter, we saw business upside resulting from demand increases in mid- and low-end smartphone segments and customer inventory restocking,” said Lora Ho, Senior Vice President and Chief Financial Officer of TSMC.

“We expect our business in the second quarter will benefit from continued inventory restocking and recovery of the delayed shipments from the earthquake.”

In fiscal year 2016, the company will spend between $9 and $10 billion on ramping up the 16-nanometer process node, constructing Fab 15 for 12-inch wafers in Nanjing, China, and beginning commercial production of the 10-nanometer FinFET process at this new facility. Samsung and Intel are also expected to start mass production of 10-nanometer products by the end of 2016.

During its Q4 2015 earnings call, company president and co-CEO Mark Liu stated the company is currently preparing and working on a 7-nanometer process node and plans to begin volume production sometime in 2018. Meanwhile, since January 2015, a separate research and development team at TSMC has been laying the groundwork for a 5-nanometer process which the company expects to bring into commercial production sometime in 1H 2020.

So far in Q1 2016, shipments of 16 and 20-nanometer wafers have accounted for around 23 percent of the company’s total wafer revenues.

Courtesy-Fud