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AMD Goes 16 Core Snowy Owl

July 22, 2016 by  
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Naples is a 32 Zen core Opteron with 64 threads. The 16 core Zen version with a BGA socket is codenamed Snowy Owl. AMD thinks that Snowy Owl will be a great match for the communication and network markets that needs a high performance 64-bit X86 CPU.

Snowy Owl has 16 cores and 32 threads, all based on 14nm FinFET Zen transistors. The processor supports up to 32MB of shared L3 cache. We also mentioned a processor cluster codenamed Zeppelin. This seems to be the key to the Zen architecture as more Zeppelin clusters are creating more core Opterons.

Each Zeppelin has eight Zen cores and each Zen core has 512KB dedicated L2 cache memory. Four Zen cores share 8MB of L3 memory making the total L3 cache size  16MB.  Zeppelin (ZP) comes with PCIe Gen 3, SATA 3, 10GbE, sever controller Hub, AMD secure processor as well as the DDR4 Memory controller. AMD is using a super-fast coherent interconnect to create more than one Zeppelin core.

One Zeppelin cluster would make an 8 core, 16 thread CPU with 4MB L2 and 16MB L3 cache and in our case product codenamed Snowy owl has 16 cores, 32 threads 8MB of L2 (512KB x 16) and 32MB L3 (4x8MB).

The Snowy Owl with 16 cores uses a SP4 Multi Chip Module (MCM) BGA socket, while the Naples uses MCM based SP3. These two are not pin compatible but 16 and 8 core Zen based Opterons will fit in the same socket.

Snowy Owl has four independent memory channels and up to 64 lanes of PCIe Gen3. When it comes to storage, it supports up to 16 SATA or NVME storage channels and 8x10GbE for some super-fast networking solutions.

As you see, there will be plenty of Zen based Opteron possibilities and most of them will start showing up by mid-2017.  The TDP Range for Snowy Owl is sub 100W and capable of sinking the TDP down to 35W. Yes, we do mean that there may well be a quad core Zen Opteron too.

Courtesy-Fud

AMD Goes Full Steam To Open-Source

December 30, 2015 by  
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AMD and now RTG (Radeon Technologies Group) are involved in a major push to open source GPU resources.

According to Ars Technica Under the handle “GPUOpen” AMD is releasing a slew of open-source software and tools to give developers of games, heterogeneous applications, and HPC applications deeper access to the GPU and GPU resources.

In a statement AMD said that as a continuation of the strategy it started with Mantle, it is giving even more control of the GPU to developers.

“ As console developers have benefited from low-level access to the GPU, AMD wants to continue to bring this level of access to the PC space.”

The AMD GPUOpen initiative is meant to give developers the ability to use assets they’ve already made for console development. They will have direct access to GPU hardware, as well as access to a large collection of open source effects, tools, libraries and SDKs, which are being made available on GitHub under an MIT open-source license.

AMD wants GPUOpen will enable console-style development for PC games through this open source software initiative. It also includes an end-to-end open source compute infrastructure for cluster-based computing and a new Linux software and driver strategy

All this ties in with AMD’s Boltzmann Initiative and an HSA (Heterogeneous System Architecture) software suite that includes an HCC compiler for C++ development. This was supposed to open the field of programmers who can use HSA. A new HCC C++ compiler was set up to enable developers to more easily use discrete GPU hardware in heterogeneous systems.

It also allows developers to convert CUDA code to portable C++. According to AMD, internal testing shows that in many cases 90 percent or more of CUDA code can be automatically converted into C++ with the final 10 percent converted manually in the widely popular C++ language. An early access program for the “Boltzmann Initiative” tools is planned for Q1 2016.

AMD GPUOpen includes a new Linux driver model and runtime targeted at HPC Cluster-Class Computing. The headless Linux driver is supposed to handle high-performance computing needs with low latency compute dispatch and PCI Express data transfers, peer-to-peer GPU support, Remote Direct Memory Access (RDMA) from InfiniBand that interconnects directly to GPU memory and Large Single Memory Allocation support.

Courtesy-Fud

AMD Appears To Be Pushing It’s Boltzmann Plan

December 10, 2015 by  
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Troubled chipmaker AMD is putting a lot of its limited investment money into the “Boltzmann Initiative” which is uses heterogeneous system architecture ability to harness both CPU and AMD GPU for compute efficiency through software.

VR-World says that stage one results are finished and where shown off this week at SC15. This included a Heterogeneous Compute Compiler (HCC); a headless Linux driver and HSA runtime infrastructure for cluster-class, High Performance Computing (HPC); and the Heterogeneous-compute Interface for Portability (HIP) tool for porting CUDA-based applications to C++ programming.

AMD hopes the tools will drive application performance from machine learning to molecular dynamics, and from oil and gas to visual effects and computer-generated imaging.

Jim Belak, co-lead of the US Department of Energy’s Exascale Co-design Center in Extreme Materials and senior computational materials scientist at Lawrence Livermore National Laboratory said that AMD’s Heterogeneous-compute Interface for Portability enables performance portability for the HPC community.

“The ability to take code that was written for one architecture and transfer it to another architecture without a negative impact on performance is extremely powerful. The work AMD is doing to produce a high-performance compiler that sits below high-level programming models enables researchers to concentrate on solving problems and publishing groundbreaking research rather than worrying about hardware-specific optimizations.”

The new AMD Boltzmann Initiative suite includes an HCC compiler for C++ development, greatly expanding the field of programmers who can leverage HSA.

The new HCC C++ compiler is a key tool in enabling developers to easily and efficiently apply the hardware resources in heterogeneous systems. The compiler offers more simplified development via single source execution, with both the CPU and GPU code in the same file.

The compiler automates the placement code that executes on both processing elements for maximum execution efficiency.

Source- http://www.thegurureview.net/computing-category/amd-appears-to-be-pushing-its-boltzmann-plan.html

AMD’s Quantum Has Intel Inside

July 1, 2015 by  
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AMD’s Project Quantum PC system, with graphics powered by two of the new Fiji GPUs may have got the pundits moist but it has been discovered that the beast has Intel inside

KitGuru confirmed that the powerful tiny system, as shown at AMD’s own event, was based upon an Asrock Z97E-ITX/ac motherboard with an Intel Core i7-4790K ‘Devil’s Canyon’ processor.

Now AMD has made a statement to explain why it chose to employ a CPU from one of its competitor in what is a flagship pioneering gaming PC.

It told Tom’s Hardware that users wanted the Devil’s Canyon chip in the Project Quantum machine.

Customers “want to pick and choose the balance of components that they want,” and the machine shown off at the E3  was considered to be the height of tech sexiness right now.

AMD said Quantum PCs will feature both AMD and Intel CPUs to address the entire market, but did you see that nice Radeon Fury… think about that right now.

IT is going to be ages before we see the first Project Quantum PCs will be released and the CPU options might change. We would have thought that AMD might want to put its FinFET process ZEN CPUs in Project Quantum with up to 16 cores and 32 threads. We will not see that until next year.

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AMD’s Fiji GPU Goes High Bandwidth

January 26, 2015 by  
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New evidence coming from two LinkedIn profiles of AMD employees suggest that AMD’s upcoming Radeon R9 380X graphics card which is expected to be based on the Fiji GPU will actually use High-Bandwidth Memory.

Spotted by a member of 3D Center forums, the two LinkedIn profiles mention both the R9 380X by name as well as describe it as the world’s firts 300W 2.5D discrete GPU SoC using stacked die High-Bandwidth Memory and silicon interposer. While the source of the leak is quite strange, these are more reliable than just rumors.

The first in line is the profile of Ilana Shternshain, an ASIC Physical Design Engineer, which has been behind the Playstation 4 SoC, Radeon R9 290X and R9 380X, which is described as the “largest in ‘King of the hill’ line of products.”

The second LinkedIn profile is the one from AMD’s System Architect Manager, Linglan Zhang, which was involved in developing “the world’s first 300W 2.5D discrete GPU SOC using stacked die High Bandwidth Memory and silicon interposer.”

Earlier rumors suggest that AMD might launch the new graphics cards early this year as the company is under heavy pressure from Nvidia’s recently released, as well as the upcoming, Maxwell-based graphics cards.

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Samsung Finally Starts 14nm FinFET

December 24, 2014 by  
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A company insider has spilled the beans in Korea, claiming that Samsung has started Apple A9 production in 14nm FinFET.

The A9 is the next generation SoC for Apple iPhone and iPad products and it is manufactured on the Samsung – GlobalFoundries 14nm FinFET manufacturing process. In the other news, Samsung’s Ki-nam, president of the company’s semiconductor business and head of System LSI business has confirmed that the company started production of 14-nanometre FinFET chips.

The report mentions Austin as a possible site for Apple products but we wonder if the GlobalFoundries Fab 8 in New York State could become one of the partners for the 14nm FinFET manufacturing. Samsung didn’t officially reveal the client for the 14nm FinFET, but Apple is the most obvious candidate, while we expect to see 14 / 16nm FinFET graphics chips from AMD and Nvidia but most likely in the latter half of 2015 at best.

Qualcomm is likely to announce new LTE modem based on 14nm FinFET and the flagship SoC Snapdragon 810 is a 20nm chip. Qualcomm is manufacturing its 810 chips as we speak to meet demand for flagship Android phones coming in Q1 2015. Flagship Samsung, HTC and LG phones among others are likely to use Snapdragon 810 as a replacement for this year’s Snapdragon 801, a high end chip that ended up in millions of high-end phones.

Samsung / GlobalFoundries14nm FinFET process is 15 percent smaller, 20 percent faster, and 35 percent more power efficient compared to 20nm processors. This definitely sounds exiting and will bring more performance into phones, tablets, GPUs and will significantly decrease power consumption. The move from 28nm is long overdue.

We believe that Qualcomm’s LTE modem might be the first chip to officially come with this manufacturing process and Apple will probably take most of the 14nm production for an update in its tablets and phones scheduled for 2015.

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